Texas Instruments /MSP432P401R /EUSCI_A2 /UCAxSTATW

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Interpret as UCAxSTATW

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UCBUSY_0)UCBUSY 0 (UCADDR_UCIDLE)UCADDR_UCIDLE 0 (UCRXERR_0)UCRXERR 0 (UCBRK_0)UCBRK 0 (UCPE_0)UCPE 0 (UCOE_0)UCOE 0 (UCFE_0)UCFE 0 (UCLISTEN_0)UCLISTEN

UCPE=UCPE_0, UCBRK=UCBRK_0, UCLISTEN=UCLISTEN_0, UCRXERR=UCRXERR_0, UCFE=UCFE_0, UCBUSY=UCBUSY_0, UCOE=UCOE_0

Description

eUSCI_Ax Status Register

Fields

UCBUSY

eUSCI_A busy

0 (UCBUSY_0): eUSCI_A inactive

1 (UCBUSY_1): eUSCI_A transmitting or receiving

UCADDR_UCIDLE

Address received / Idle line detected

UCRXERR

Receive error flag

0 (UCRXERR_0): No receive errors detected

1 (UCRXERR_1): Receive error detected

UCBRK

Break detect flag

0 (UCBRK_0): No break condition

1 (UCBRK_1): Break condition occurred

UCPE

Parity error flag. When UCPEN = 0, UCPE is read as 0. UCPE is cleared when UCAxRXBUF is read.

0 (UCPE_0): No error

1 (UCPE_1): Character received with parity error

UCOE

Overrun error flag

0 (UCOE_0): No error

1 (UCOE_1): Overrun error occurred

UCFE

Framing error flag

0 (UCFE_0): No error

1 (UCFE_1): Character received with low stop bit

UCLISTEN

Listen enable

0 (UCLISTEN_0): Disabled

1 (UCLISTEN_1): Enabled. UCAxTXD is internally fed back to the receiver

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